MT9044AL X04 - [ MT9044ALX04 (A4) ]
Digital IC Shop
MT9044AL X04 - [ MT9044ALX04 (A4) ]
7,500Ft
The MT9044 T1/E1/OC3 System Synchronizer
contains a digital phase-locked loop (DPLL), which
provides timing and synchronization signals for
multitrunk T1 and E1 primary rate transmission links
and STS-3/0C3 links.
The MT9044 generates ST-BUS clock and framing
signals that are phase locked to either a 2.048MHz,
1.544MHz, or 8kHz input reference.
The MT9044 is compliant with AT&T TR62411 and
Bellcore GR-1244-CORE Stratum 3, Stratum 4
Enhanced, and Stratum 4; and ETSI ETS 300 011. It
will meet the jitter/wander tolerance, jitter/wander
transfer, intrinsic jitter/wander, frequency accuracy,
capture range, phase change slope, holdover
frequency and MTIE requirements for these
specifications.
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The MT9044 T1/E1/OC3 System Synchronizer
contains a digital phase-locked loop (DPLL), which
provides timing and synchronization signals for
multitrunk T1 and E1 primary rate transmission links
and STS-3/0C3 links.
The MT9044 generates ST-BUS clock and framing
signals that are phase locked to either a 2.048MHz,
1.544MHz, or 8kHz input reference.
The MT9044 is compliant with AT&T TR62411 and
Bellcore GR-1244-CORE Stratum 3, Stratum 4
Enhanced, and Stratum 4; and ETSI ETS 300 011. It
will meet the jitter/wander tolerance, jitter/wander
transfer, intrinsic jitter/wander, frequency accuracy,
capture range, phase change slope, holdover
frequency and MTIE requirements for these
specifications.
The product data sheet can be downloaded by clicking here