74LS125AM

DM74LS125A

Quad 3-STATE Buffer

General Description

This device contains four independent gates each of which

performs a non-inverting buffer function. The outputs have

the 3-STATE feature. When enabled, the outputs exhibit

the low impedance characteristics of a standard LS output

with additional drive capability to permit the driving of bus

lines without external resistors. When disabled, both the

output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither

as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to

opposite logic levels, the disable time is shorter than the

enable time of the outputs.

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